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AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 1 www.analogictech.com general description the AAT3601 is a member of analogictech?s total power management ic tm (tpmic tm ) product family. it contains a single-cell lithium ion/polymer battery charger, a fully integrated step-down converter and 5 low dropout (ldo) regulators. the device also includes 2 load switches for dynamic power path/sleep mode operation, making it ideal for small portable short-range communications enabled mobile devices and telephones. the battery charger is a complete thermally regulated constant current/constant voltage linear charger. it includes an integrated pass device, reverse blocking pro- tection, high accuracy current and voltage regulation, charge status, and charge termination. the charging current and the charge termination current as well as recharge voltage are programmable with either an exter- nal resistor and/or by a standard i 2 c interface. the step-down dc/dc converter is integrated with inter- nal compensation and operates at a switching frequency of 1.5mhz, thus minimizing the size of external compo- nents while keeping switching losses low and efficiency greater than 95%. all ldo output voltages are program- mable using the i 2 c interface. the five ldos offer 60db power supply rejection ratio (psrr) and low noise operation making them suitable for powering noise-sensitive loads. the ldos and dc/dc converter are separated into permanent-enabled (pe) and non-permanent (np) enabled supplies. all six voltage regulators operate with low quiescent cur- rent. the total no load current when the 3 pe ldos are enabled is only 200 a. the device includes a watchdog timer input and two reset outputs for the watchdog and ldo regulation. the device also can be programmed through a standard i 2 c interface. the AAT3601 is available in a thermally enhanced low profile 5x5x0.8mm 36-pin tqfn package. features ? voltage regulator v in range: 4.5v to 6v ? complete power integration ? integrated load switches to power converters from ac adapter or battery automatically ? low standby current ? 200 a (typ) w/ldo1, ldo2 and ldo5 active, no load ? one step-down buck converter (np) ? 1.24v, 300ma output ? 1.5mhz switching frequency ? fast turn-on time (120 s typ) ? five ldos programmable by i 2 c ? ldo1: 3.4v, 150ma (pe) ? ldo2: 3.4v, 300ma (np) ? ldo3: 1.24v, 300ma (pe) ? ldo4: 1.85v, 300ma (np) ? ldo5: 1.85v, 300ma (pe) ? psrr: 60db @10khz ? noise: 50 vrms ? one battery charger ? digitized thermal regulation ? charge current programming up to 1.4a ? charge current termination programming ? automatic trickle charge for battery preconditioning (2.8v cutoff) ? watchdog (wdi) timer input ? two reset (rstin, rstlpw) timer outputs ? separate enable pins for pe and np supplies ? digital programming of major parameters via i 2 c ? over-current protection ? over-temperature protection ? 5x5mm tqfn55-36 package applications ? digital cameras ? gsm or cdma cellular phones ? handheld instruments ? pdas and handheld computers ? portable media players ? short-range communication headsets
AAT3601178 total power solution for portable applications product datasheet 2 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 2 3601.2008.07.1.1 www.analogictech.com typical application ldo2 enable ldo1 enable ldo4 ldo5 enable enable enable ldo3 enable step-down buck chgin uvlo bat pgnd sysout 100m 500m pvin lx outbuck out5 out4 vin vin vin vin vin vin out3 out2 out1 ref avin2 en_np wdi temp_flag rstin ref ref ref ref ref ref cnoise agnd avin1 vin i 2 c and enable/reset control en_sys rstlpw sda scl iset ref charger control stat_bat stat enbat use_usb ts sysout ldo ct en_pe to avin1,avin2, pvin 10 f 5v from a c adapter or usb port system supply 10 f 1 cell li+ battery + - to sysout to sysout to sysout 10 f 0.01 f 4.7f 2.2 h np 1.24v 300ma 10 f 10 f 10 f 10 f 22 f pe 3.4v, 150ma np 3.4v, 300ma pe 1.24v, 300ma np 1.85v, 300ma pe 1.85v, 300ma 1.24k 10k ntc for bat temp sense 0.1f 100k to out1 100k to sysout c 100k to sysout 100k 100k to out1
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 3 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 3 www.analogictech.com pin descriptions pin # symbol function 1 wdi watchdog timer input. clock input from processor. if no clock input is detected for 60ms, it will reset rstin. 2 temp_flag open drain output which pulls low when an over temperature shutdown occurs in the regulator or the char- ger and when the thermal loop in the charger is activated. 3 en_sys active low enable for the system. an internal pull-up resistor (150k ) keeps the pin pulled up to an internal supply to keep the system off when there is no chgin input. connect a normally-open pushbutton switch from this pin to gnd. to lter noise internally, there is an internal 100 s debounce delay circuit. 4 stat_bat open drain output for battery charger status. same function as stat pin but with opposite polarity. 5 en_pe active low enable for permanently-enabled supplies: ldo1, ldo3, and ldo5. (this pin is internally pulled low with 250na) 6 en_np active high enable for non-permanent supplies: buck, ldo2, and ldo4 (this pin is internally pulled low with 250na) 7 sgnd signal ground 8 sgnd signal ground 9 out5 output for ldo5 (when disabled, this pin is pulled down with 10k ) 10 out4 output for ldo4 (when disabled, this pin is pulled down with 10k ) 11 avin2 analog voltage input. must be tied to sysout on the pcb. 12 out3 output for ldo3 (when disabled, this pin is pulled down with 10k ) 13 out2 output for ldo2 (when disabled, this pin is pulled down with 10k ) 14 avin1 analog voltage input. must be tied to sysout on the pcb. 15 out1 output for ldo1 (when disabled, this pin is pulled down with 10k ) 16 agnd signal ground 17 cnoise noise bypass pin for the internal reference voltage. connect a 0.01 f capacitor to agnd. 18 rstlpw open drain reset output. pulled low internally when any permanent supply (ldo1, ldo3, ldo5) are not in regulation. releases high 800ms (typ) after all supplies are in regulation. 19 rstin open drain reset output. pulled low internally when any non-permanent supply (buck, ldo2, or ldo4) are not in regulation. releases high 10ms (typ) after all supplies are in regulation. 20 lx step-down buck converter switching node. connect an inductor between this pin and the output. 21 pgnd power ground for step-down buck converter. 22 pvin input power for step-down buck converter. must be tied to sysout. 23 outbuck feedback input for the step-down buck converter. 24, 25 sysout system power output. connect to the input voltage pins pin, avin1/2 for the step-down converter and ldos and other external supply requirements. 26, 27 bat connect to a lithium-ion battery. 28 chgin power input from either external adapter or usb port. 29 use_usb when pulled high, fast charge current is set to 100ma regardless of the resistor value present on the iset pin. additionally, the chgin-sysout ldo will be disabled and the bat-sysout load switch will be enabled. 30 enbat active low enable for the battery charger (internally pulled low when oating) 31 ts battery temperature sense pin with 75 a output current. connect the battery?s ntc resistor to this pin and ground. 32 iset charge current programming input pin. can be used to monitor charge current. 33 ct charger safety timer pin. a 0.1 f ceramic capacitor should be connected between this pin and gnd. connect directly to gnd to disable the timer function. 34 stat open drain output for battery charging status. 35 sda i 2 c serial data pin, open drain; requires a pullup resistor. 36 scl i 2 c serial clock pin, open drain; requires a pullup resistor. ep ep the exposed thermal pad (ep) must be connected to board ground plane and pins 16 and 21. the ground plane should include a large exposed copper pad under the package for thermal dissipation (see package outline).
AAT3601178 total power solution for portable applications product datasheet 4 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 4 3601.2008.07.1.1 www.analogictech.com pin configuration tqfn55-36 (top view) wdi temp_flag en_sys stat_bat en_pe en_np sgnd sgnd out5 bat bat sysout sysout outbuc k pvin pgnd lx rstin scl sda stat ct iset ts enbat use_usb chgin out4 avin2 out3 out2 avin1 out1 agnd cnoise rstlpw 1 2 3 4 5 6 7 8 9 27 26 25 24 23 22 21 20 19 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 5 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 5 www.analogictech.com absolute maximum ratings 1 t a = 25c unless otherwise noted. symbol description value units v in input voltage, chgin, bat -0.3 to 6.5 v power and logic pins maximum rating v in + 0.3 v t j operating junction temperature range -40 to 150 c t s storage temperature range -65 to 150 c t lead maximum soldering temperature (at leads, 10 sec) 300 c recommended operating conditions 2 symbol description value units ja thermal resistance 25 c/w p d maximum power dissipation 4 w 1. stresses above those listed in absolute maximum ratings may cause permanent damage to the device. functional operation at co nditions other than the operating conditions specified is not implied. only one absolute maximum rating should be applied at any one time. 2. thermal resistance was measured with the AAT3601 device on the 4-layer fr4 evaluation board in a thermal oven. the amount of power dissipation which will cause the thermal shutdown to activate will depend on the ambient temperature and the pc board layout ability to dissipate the heat. see figures 13-16.
AAT3601178 total power solution for portable applications product datasheet 6 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 6 3601.2008.07.1.1 www.analogictech.com electrical characteristics 1 v in = 5v, v bat = 3.6v, -40 c t a +85 c, unless otherwise noted. typical values are t a = 25 c. symbol description conditions min typ max units power supply v chgin chgin input voltage 4.5 6 v i q battery standby current ldo1 + ldo2 + ldo5, no load 200 a i shdn battery shutdown current en_sys, en_pe = high, en_np = low 10.0 a uvlo under-voltage lockout for chgin chgin rising 4.25 4.5 v chgin falling 4.15 v battery under-voltage lockout bat rising 2.6 v bat falling 2.35 v i bat leakage current from bat pin v bat = 4v, v chgin = 0v 2 5 a reset timers t rstin reset timer for non-permanent supplies buck, out2, and out4 in regulation 5 10 15 ms t rstlpw reset timer for permanent supplies out1, out3, and out5 in regulation 600 800 1000 ms reset thr reset comparator threshold for each output falling, typical hysteresis = 2.7% 88.3 91.3 94.3 % of typ t wdi watchdog timeout period 50 70 ms wdi pw wdi pulse width 0.1 s wdi thrl wdi input threshold vil 0.4 v wdi thrh wdi input threshold vih 1.2 v wdi lk wdi input current wdi = 0 or sysout -1 1 a charger voltage regulation v bat_reg output charge voltage regulation 0 c t a +70 c 4.158 4.200 4.242 v v min preconditioning voltage threshold (no trickle charge option can be made available) 2.6 2.8 3.0 v v rch battery recharge voltage threshold i 2 c recharge code = 00 (default) 4.00 v i 2 c recharge code = 01 4.05 v i 2 c recharge code = 10 4.10 v i 2 c recharge code = 11 4.15 v charger current regulation i ch_cc constant-current mode charge current r iset = 1.24k (for 0.8a), use_usb = low, i 2 c iset code = 000, v bat = 3.6v, v chgin = 5.0v 720 800 880 ma use_usb = high, i 2 c iset code = 000, v bat = 3.6v 85 100 115 ki_set charge current set factor: i ch_cc /i iset constant-current mode, v bat = 3.6v 800 % i ch_cc r iset = 1.24k ; use_usb = low 12 i ch_pre preconditioning-charge current i 2 c iset code = 000, use_usb = high 50 ma i ch_term charge termination threshold current i 2 c term code = 00 (default) 5 % i ch_cc i 2 c term code = 01 10 i 2 c term code = 10 15 i 2 c term code = 11 20 1. specification over the ?40c to +85c operating temperature range is assured by design, characterization and correlation wit h statistical process controls.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 7 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 7 www.analogictech.com electrical characteristics 1 v in = 5v, v bat = 3.6v, -40 c t a +85 c, unless otherwise noted. typical values are t a = 25 c. symbol description conditions min typ max units charging devices r ds(on) charging transistor on resistance v in = 5v 0.6 0.9 logic control / protection v en_pe or en_np input high threshold 1.4 v v en_pe or en_np input low threshold 0.4 v v stat , v stat_bat , v temp_flag output low voltage i sink = 4ma 0.4 v i stat , i stat_bat , i temp_flag output pin current sink capability 8ma v ovp over voltage protection threshold 4.3 v v ocp over current protection threshold 105 %v cs t c constant current mode time out c ct = 100nf, v chgin = 5v 3 hours t k trickle charge time out t c / 8 hours t v constant voltage mode time out 3 hours i ts current source from ts pin 71 75 79 a ts 1 ts hot temperature fault falling threshold 318 331 346 mv hysteresis 25 ts 2 ts cold temperature fault rising threshold 2.30 2.39 2.48 v hysteresis 25 mv t loop_in thermal loop entering threshold 115 c t loop_out thermal loop exiting threshold 85 c t reg thermal loop regulation 100 c load switches / sysout ldo r ds(on),bat-sysout on resistance of bat-sysout load switch v bat = 3.6v 100 150 m r ds(on),chgin-sysout on resistance of chgin-sysout load switch v chgin = 4.5v 0.5 0.75 sysout ldo input voltage range 4.5 v sysout ldo output voltage i sysout < 900ma, v chgin = 4.5v to 6.0v 3.4 3.9 4.2 v i sysout output current v chgin = 5v 1.5 a step-down buck converter v outbuck output voltage accuracy i outbuck = 0 to 300ma; v in = 2.7v to 5.5v 1.203 1.24 1.277 v buck load regulation load = 100 a to 300ma, pvin = 3.6v, v outbuck = 1.2v 0.2 % buck ground pin current no load 45 a i limoutbuck p-channel current limit 0.8 a r ds(on)l high side switch on-resistance 0.8 r ds(on)h low side switch on-resistance 0.8 f osc oscillator frequency t a = 25 c 1.5 mhz t s start-up time from enable to regulation; c outbuck = 4.7 f, c noise = on 100 s 1. specification over the ?40c to +85c operating temperature range is assured by design, characterization and correlation wit h statistical process controls.
AAT3601178 total power solution for portable applications product datasheet 8 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 8 3601.2008.07.1.1 www.analogictech.com electrical characteristics 1 v in = 5v, v bat = 3.6v, -40 c t a +85 c, unless otherwise noted. typical values are t a = 25 c. symbol description conditions min typ max units ldo1 v out1 output voltage accuracy i out1 = 0 ~ 150ma, v avinx : 3.3v ~ 5.5v -3 +3 % ldo ground pin current for each ldo with no load 45 a i out1 output current 150 ma i lim1 output current limit 1000 ma v do1 dropout voltage i out1 = 150ma 90 180 mv v out1 / (v out1 v in1 ) line regulation i out1 = 10ma, 3.6v < v avinx < 5.5v 0.1 %/v v out1 load regulation i out1 = 0.5ma ~ 150ma 40 mv psrr power supply rejection ratio i out1 = 10ma, c out1 = 22 f, 100hz ~ 10khz 60 db t s start up time from enable to regulation; c out1 = 22 f, c noise = on 3.5 ms ldo2 v out2 output voltage accuracy i out2 = 0 ~ 300ma, v avinx : 3.3v ~ 5.5v -3 +3 % i out2 output current 300 ma i lim2 output current limit 1000 ma v do2 dropout voltage i out2 = 150ma 180 mv v out2 / (v out2 v in2 ) line regulation i out2 = 10ma, 3.6v < v avinx < 5.5v 0.1 %/v v out2 load regulation load: 0.5ma ~ 300ma 40 mv psrr power supply rejection ratio i out2 = 10ma, c out2 = 10 f, 10 ~ 10khz 60 db ts start up time from enable to regulation; c out2 = 10 f, c noise = on 1.7 ms ldo3, ldo4, and ldo5 v outx output voltage accuracy i outx = 0 ~ 300ma, v avinx : 3.3v ~ 5.5v -3 +3 % i outx output current 300 ma i limx output current limit 1000 ma v dox dropout voltage i outx = 150ma 180 mv v outx / (v outx v inx ) line regulation i outx = 10ma, 3.6v < v avinx < 5.5v 0.1 %/v v outx load regulation i outx = 0.5ma ~ 300ma 40 mv psrr power supply rejection ratio i outx = 10ma, c outx = 10 f, 10 ~ 10khz 60 db e n output noise voltage i outx = 10ma, power bw: 10khz ~ 100khz 50 vrms t s start up time from enable to regulation; c outx = 10 f, c noise = on 1.2 ms logic control v ih enable pin logic high level en_pe, en_np 1.4 v v il enable pin logic low level 0.4 v thermal t sd over temperature shutdown threshold 140 ? c t hys over temperature shutdown hysteresis 15 ? c 1. specification over the ?40c to +85c operating temperature range is assured by design, characterization and correlation wit h statistical process controls.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 9 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 9 www.analogictech.com electrical characteristics 1 v in = 5v, v bat = 3.6v, -40 c t a +85 c, unless otherwise noted. typical values are t a = 25 c. symbol description conditions min typ max units scl, sda (i 2 c interface) f scl clock frequency 0 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t hd_sta hold time start condition 0.6 s t su_sta setup time for repeat start 0.6 s t su_dta data setup time 100 ns t hd_dat data hold low 0 0.9 s t su_sto setup time for stop condition 0.6 s t buf bus free time between stop and start condition 1.3 s v il input threshold low 2.7v v in 5.5v 0.4 v v ih input threshold high 2.7v v in 5.5v 1.4 v i i input current -1.0 1.0 a v ol output logic low (sda) i pullup = 3ma 0.4 v basic i 2 c timing diagram t su_sto t su_sta t hd_sta t high t low t su_dat t hd_dat sda scl t buf t hd_sta 1. specification over the ?40c to +85c operating temperature range is assured by design, characterization and correlation wit h statistical process controls.
AAT3601178 total power solution for portable applications product datasheet 10 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 10 3601.2008.07.1.1 www.analogictech.com typical characteristics ? charger charging current vs. battery voltage (r iset = 1.24k ) battery voltage (v) i ch (ma) 0 100 200 300 400 500 600 700 800 900 2.5 2.9 3.3 3.7 4.1 4.5 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v preconditioning threshold voltage vs. temperature temperature (c) v min (v) 2.790 2.792 2.794 2.796 2.798 2.800 2.802 2.804 2.806 2.808 2.810 -50 -25 0 25 50 75 100 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v preconditioning charge current vs. temperature (v bat = 2.5v, r set = 1.24k ) temperature (c) i ch_pre (ma) 80 85 90 95 100 105 110 115 -50 -25 0 25 50 75 10 0 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v recharge voltage threshold vs. temperature (v rch set to 4.0v by i 2 c) temperature (c) v rch (v) 3.96 3.97 3.98 3.99 4.00 4.01 4.02 4.03 4.04 4.05 4.06 -50 -25 0 25 50 75 100 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v output charge voltage regulation vs. temperatur e (end of charge voltage) temperature (c) v bat_reg (v) 4.16 4.17 4.18 4.19 4.20 4.21 4.22 4.23 4.24 4.25 -50 -25 0 25 50 75 100 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v charge termination threshold current vs. temperature temperature (c) i ch_term (ma) 0 10 20 30 40 50 60 70 80 90 100 -50 -25 0 25 50 75 100 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 11 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 11 www.analogictech.com typical characteristics ? charger (continued) constant current mode charge current vs. temperature (v bat = 3.6v; r iset = 1.24k ) temperature (c) i ch_cc (ma) 300 400 500 600 700 800 900 -50 -25 0 25 50 75 100 v chgin = 6.0v v chgin = 5.5v v chgin = 5.0v v chgin = 4.5v constant current mode charge current vs. input voltage (r set = 1.24k ) chgin voltage (v) i ch_cc (ma) 700 720 740 760 780 800 820 840 860 880 900 4.5 4.75 5 5.25 5.5 5.75 6 v bat = 3.3v v bat = 3.6v v bat = 4.1v
AAT3601178 total power solution for portable applications product datasheet 12 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 12 3601.2008.07.1.1 www.analogictech.com typical characteristics ? step-down buck converter step-down buck efficiency vs. output current (v out = 1.24v; l = 2.2h) output current (ma) efficiency (%) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 100 0 v chgin = 4.5v v chgin = 5v v chgin = 5.5v v chgin = 6v v bat = 4.2v v bat = 3.6v v bat = 3v step-down buck load regulation vs. output current (v out = 1.24v; l = 2.2h) output current (ma) load regulation (%) -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 1 10 100 1000 v chgin = 4.5v v chgin = 5v v chgin = 5.5v v chgin = 6v v bat = 4.2v v bat = 3.6v v bat = 3v step-down buck line regulation vs. chgin and battery input voltage (v out = 1.24v; l = 2.2h) input v bat , v chgin (v) line regulation (%) -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 2.5 3 3.5 4 4.5 5 5.5 6 4.2 i out = 1ma i out = 10ma i out = 50ma i out = 100ma i out = 200ma i out = 300ma v bat v chgin step-down buck output voltage vs. temperature (i out = 10ma) temperature (c) v out (v) 1.232 1.234 1.236 1.238 1.240 1.242 1.244 1.246 1.248 -50 -25 0 25 50 75 100 v chgin = 6.0v v chgin = 5.5v v chgin = 5v v chgin = 4.5v v bat = 4.2v v bat = 3.6v v bat = 3v v bat line transient response step-down buck (v bat = 3.5v to 4.2v; i out = 300ma; v out = 1.24v; c out = 4.7f) time (100s/div) output voltage (top) (v) input voltage (bottom) (v) 1.16 1.20 1.24 1.28 1.32 3.0 3.5 4.0 4.5 load transient response step-down buck (10ma to 150ma; v bat = 3.6v; v out = 1.24v; c out = 4.7f) time (100s/div) output voltage (top) (v) load current (bottom) (ma) 1.20 1.25 1.30 0 50 100 150 200 250 300 350
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 13 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 13 www.analogictech.com typical characteristics ? step-down buck converter (continued) load transient response (100ma to 300ma; v bat = 3.6v; v out = 1.24v; c out = 4.7f) time (100s/div) output voltage (top) (v) load current (bottom) (ma) 1.20 1.25 1.30 0 100 200 300 400 500 600 700
AAT3601178 total power solution for portable applications product datasheet 14 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 14 3601.2008.07.1.1 www.analogictech.com typical characteristics - ldo1 ldo1 load regulation vs. output current using chgin input (v out1 = 3.4v) output current (ma) load regulation (%) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1 10 100 1000 v chgin = 6v v chgin = 5.5v v chgin = 5v v chgin = 4.5v ldo1 load regulation vs. output current using battery input (v out1 = 3.4v) output current (ma) load regulation (%) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1 10 100 1000 v bat = 4.2v v bat = 3.9v v bat = 3.6v ldo1 output voltage vs. temperature (i out1 = 10ma) temperature (c) v out1 (v) 3.36 -50 -25 0 25 50 75 100 3.37 3.38 3.39 3.40 3.41 3.42 3.43 3.44 v in = 6.0v v in = 5.5v v in = 5v v in = 4.5v v bat = 4.2v v bat = 3.6v ldo1 line regulation vs. chgin and battery input voltage (v out1 = 3.4v) input v bat , v chgin (v) line regulation (%) -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 3 3.5 4 4.5 5 5.5 6 4.2 i out = 1ma i out = 10ma i out = 50ma i out = 100ma i out = 150ma v bat v chgin ldo1 dropout characteristics vs. input voltage (v out1 = 3.4v) input voltage (v) output voltage v out1 (v) 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4. 2 i out = 1ma i out = 10ma i out = 50ma i out = 100ma i out = 150ma ldo1 dropout voltage vs. output current (v out1 = 3.4v) output current (ma) dropout voltage (mv) 0 20 40 60 80 100 120 0 25 50 75 100 125 150 -40c 25c 85c
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 15 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 15 www.analogictech.com typical characteristics ? ldo1 (continued) v bat line transient response ldo1 (v bat = 3.7v to 4.2v; i out1 = 150ma; v out1 = 3.4v) time (100s/div) output voltage (top) (v) input voltage (bottom) (v) 3.36 3.38 3.40 3.42 3.44 3.0 3.5 4.0 4.5 load transient response ldo1 (10ma to 75ma; v bat = 3.6v; v out = 3.4v) time (200s/div) output voltage (top) (v) load current (bottom) (ma) 3.36 3.38 3.40 3.42 3.44 0 50 100 150 200 250 300 350 load transient response ldo1 (75ma to 150ma; v bat = 3.6v; v out = 3.4v) time (200s/div) output voltage (top) (v) load current (bottom) (ma) 3.32 3.36 3.40 3.44 3.48 0 50 100 150 200 250 300 350 400 typical characteristics ? ldo2 ldo2 dropout characteristics vs. input voltage (v out2 = 3.4v) input voltage (v) output voltage v out2 (v) 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 i out = 1ma i out = 10ma i out = 50ma i out = 100ma i out = 200ma i out = 300ma ldo2 dropout voltage vs. output current (v out2 = 3.4v) output current (ma) dropout voltage (mv) 0 50 100 150 200 250 300 350 400 450 0 50 100 150 200 250 300 -40c 25c 85c
AAT3601178 total power solution for portable applications product datasheet 16 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 16 3601.2008.07.1.1 www.analogictech.com typical characteristics ? ldo4 ldo4 load regulation vs. output current using chgin input (v out4 = 1.85v) output current (ma) load regulation (%) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1 10 100 1000 v chgin = 6v v chgin = 5.5v v chgin = 5v v chgin = 4.5v ldo4 load regulation vs. output current using battery input (v out4 = 1.85v) output current (ma) load regulation (%) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1 10 100 1000 v bat = 4.2v v bat = 3.9v v bat = 3.6v ldo4 output voltage vs. temperature (i out4 = 10ma) temperature (c) v out4 (v) 1.80 1.81 1.82 1.83 1.84 1.85 1.86 1.87 1.88 1.89 1.90 -50 -25 0 25 50 75 100 v in = 6.0v v in = 5.5v v in = 5v v in = 4.5v v bat = 4.2v v bat = 3.6v v bat = 3v ldo4 line regulation vs. chgin and battery input voltage (v out4 = 3.4v) input v bat , v chgin (v) line regulation (%) -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 3 3.5 4 4.5 5 5.5 6 4.2 i out = 1ma i out = 10ma i out = 50ma i out = 100ma i out = 200ma i out = 300ma v bat v chgin
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 17 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 17 www.analogictech.com typical characteristics ? general quiescent current vs. input voltage (ldo1 + ldo3 + ldo5; no load) input voltage (v) quiescent current (a) 0 100 200 300 400 500 600 2.7 3.2 3.7 4.2 4.7 5.2 5.7 85c 25c -40c v bat v chgin start-up sequence permanent-enabled (pe) supplies (v chgin = 5.0v) time (1ms/div) output voltage (2v/div) buck ldo3 ldo5 ldo1 0 0 0 0 start-up sequence non-permanent (np) supplies (v chgin = 5.0v) time (500s/div) output voltage (2v/div) en_np ldo2 ldo4 buck 0 0 0 0 watchdog timer (wdi = 0v) time (10ms/div) output voltage (1v/div) rstin wdi 0 0 ldo power supply rejection ratio, psrr (i out3 = 10ma, bw = 100~100khz) frequency (hz) magnitude (db) 0 15 30 45 60 75 90 105 120 135 150 100 1000 10000 100000 ldo output voltage noise (no load; power bw: 100~100khz) frequency (hz) noise (vrms) 0.00 0.60 1.20 1.80 2.40 3.00 3.60 4.20 4.80 5.40 6.00 100 1000 10000 100000
AAT3601178 total power solution for portable applications product datasheet 18 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 18 3601.2008.07.1.1 www.analogictech.com typical characteristics ? general (continued) ldo output voltage noise (i out3 = 10ma, power bw = 100~100khz) frequency (hz) noise (vrms) 0.00 0.60 1.20 1.80 2.40 3.00 3.60 4.20 4.80 5.40 6.00 100 1000 10000 100000
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 19 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 19 www.analogictech.com functional block diagram ldo2 ldo1 ldo4 ldo5 enable enable enable enable enable enable ldo3 step-down buck chgin uvlo bat pgnd sysout 100m 500m pvin lx outbuc k out1 out2 vin vin vin vin vin vin out3 out4 out5 ref avin 2 en_np wdi temp_flag rstin ref ref ref ref ref ref cnoise agnd avin1 vin i 2 c and enable/reset control en_sys rstlpw sda scl iset ref charger control stat_bat stat enbat use_usb ts sysout ldo ct en_pe sgnd sgnd
AAT3601178 total power solution for portable applications product datasheet 20 3601.2008.07.1.1 www.analogictech.com functional description the AAT3601 is a complete power management solution. it seamlessly integrates an intelligent, stand-alone cc/ cv (constant-current/constant-voltage), linear-mode single-cell battery charger with one step-down buck con- verter and five low-dropout (ldo) regulators to provide power from either a wall adapter or a single-cell lithium- ion/polymer battery. internal load switches allow the ldo regulators and dc-dc converter to operate from the best available power source of either an ac wall adapter, usb port supply, or battery. if only the battery is available, then the voltage regula- tors and converter are powered directly from the battery through a 100m load switch. (the charger is put into sleep mode and draws less than 1 a quiescent current.) if the system is connected to a wall adapter, then the voltage converters are powered directly from the adapt- er through a 500m load switch and the battery is dis- connected from the voltage converter inputs. this allows the system to operate regardless of the charging state of the battery or with no battery. the ldos and dc/dc converter are separated into permanently-enabled (pe) system-on supplies and non-permanent (np) separate enable supplies referring to the two independent enable functions. system output (sysout) intelligent control of the integrated load switches is managed by the switch control circuitry to allow the step-down converter and the ldos to have the best available power source. when the chgin pin voltage is above 4.5v, the system automatically turns on and the power to the sysout pin will be provided by either the chgin pin or the bat pin. when the use_usb pin is low, the chgin provides power to sysout through an inter- nal ldo regulated to 3.9v. when the use_usb pin is high or if forced through use of an i 2 c command, the bat pin is shorted to sysout through a 100m switch. if a chgin voltage is not present and the system is enabled, sysout will be shorted to bat. this system allows the step-down converter and ldos to always have the best available source of power. this also allows the voltage converters to operate with no battery, or with a battery voltage that falls below the precondi- tion trickle charge threshold. typical power up sequence the AAT3601 supports two enable/disable schemes. system startup is initiated whenever one of the following conditions occurs: 1. a push-button is used to assert en_sys low when a valid supply (>chgin uvlo) is not connected to the charger input chgin. 2. a valid adaptor supply (>chgin uvlo) is connected to the charger input chgin. case 1 the startup sequence for the AAT3601 is typically initiated by pulling the en_sys pin low with a pushbutton switch (see figure 1). the sysout is the first block to be turned on. when the output of the sysout reaches 90% of its final value, then the pe supplies ldo1, ldo3 and ldo5 are enabled if en_pe is low. when the pe supplies reach 90% of their final value, the 800ms rstlpw timer is initi- ated holding the microprocessor in reset. when the rstlpw pin goes high, the np sequence supplies ldo2, ldo4 and outbuck can be enabled and disabled as desired using the en_np pin. when the np supplies reach 90% of their final value, the 10ms rstin timer is released. the np outputs should not be started up until after the rstlpw pin goes high. do not start all the outputs up at the same time. the state of en_sys is latched as long as either chgin or bat is connected to the device. case 2 alternatively, the startup sequence is automatically started without the pushbutton switch when the chgin pin rises above its uvlo threshold. the battery charger is started when chgin_ok is internally enabled. the stat pin goes high and the system is enabled. sequence of startup depends on whether or not the adapter input is connected or open. the timing diagrams in figures 2 and 3 illustrate the two cases. a typical startup and shutdown process proceeds as follows (referring to figures 1, 2 and 3). typical power down sequence if only the battery is connected and the voltage level is above the bat uvlo, then the en_pe pin can be held low in order to power down AAT3601. when the voltage at the chgin pin is above the chgin uvlo, the device can- not be powered down but the en_pe and en_np pins can be used to disable the pe and np supplies. if the adapter supply at the chgin pin is disconnected, the device will power down even if bat is connected if the en_sys state was not first latched into the device by pulling it low when either bat or chgin is connected. if chgin falls below uvlo without being disconnected, the en_sys will still be latched and the device will remain powered. the outputs of the ldos are internally pulled to ground with 10k during shutdown to discharge the output capacitors and ensure a fast turn-off response time.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 21 www.analogictech.com chgin en_sys en_pe wdi enbat 100 s debounce push-button on switch 60ms watchdog ldo4 ldo2 dc/dc buck ldo5 ldo3 ldo1 uvlo q q set d r 1 charger stat_bat stat 1k to sysou t chgin bat sysout mux sysout sysout uvlo en_np pok 1 pok 3 pok 5 pokbuck pok 2 pok 4 800ms typ delay 10ms typ delay rstlpw 100k to sysout rstin 100k to sysout figure 1: enable, watchdog and reset functions detailed schematic. en_sys pin system enable (internal) 100s debounce sysout sysout_ok (internal) ldo1 3.4v ldo3 1.24v ldo5 1.85v rstlpw pin 800ms reset time 10ms reset time en_pe en_np ldo2 dc/dc 1.24v ldo4 1.85v 3.4v rstin pin 1.24v 1.85v 3.4v shutdown system enabling np enabling the system shutdown np 0v battery voltage figure 2a: power up/down sequence; case 1, adapter is not connected.
AAT3601178 total power solution for portable applications product datasheet 22 3601.2008.07.1.1 www.analogictech.com watchdog timer input (wdi) the AAT3601 includes an internal watchdog timer that can be controlled by a p. after rstin goes high, the watchdog timer must get clock edges on the wdi pin from the processor. the wdi clock edges must be < 60ms apart to reset the internal watchdog timer or the rstin pin will become active low. battery charger figure 4 illustrates the entire battery charging profile which consists of three phases. 1. preconditioning-current mode (trickle) charge 2. constant-current mode charge 3. constant-voltage mode charge preconditioning trickle charge battery charging commences only after the AAT3601 bat- tery charger checks several conditions in order to main- tain a safe charging environment. the system operation flow chart for the battery charger operation is shown in figure 5. the input supply must be above the minimum operating voltage (uvlo) and the enable pin (enbat) must be low (it is internally pulled down). when the bat- tery is connected to the bat pin, the battery charger checks the condition of the battery and determines which charging mode to apply. preconditioning-current mode charge current if the battery voltage is below the preconditioning voltage threshold v min , then the battery charger initiates precondition trickle charge mode and charges the battery at 12% of the programmed constant-current magnitude. for example, if the programmed current is 500ma, then the trickle charge current will be 60ma. trickle charge is a safety precaution for a deeply discharged cell. it also reduces the power dissipation in the internal series pass mosfet when the input-output voltage differential is at its highest. en_sys pin system enable (internal) sysout sysout_ok (internal) ldo1 3.4v ldo3 1.24v ldo5 1.85v rstlpw pin 800ms reset time 10ms reset time en_pe pin en_np pin ldo2 dc/dc 1.24v ldo4 1.85v 3.4v rstin pin 1.24v 1.85v 3.4v shutdown system enabling np enabling the system shutdown np 0v battery voltage chgin chgin_ok (internal) 0ma 800ma enbat pin 0ma stat pin led current 0ma 0ma charger current figure 2b: power up/down sequence; case 2, connecting the adapter automatically starts the system.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 23 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 23 www.analogictech.com wdi rstin pok of non-permanent supplies t wdi = watchdog timer timeout (60ms) t rstin = rstin pin reset time (10ms) t rstin t < t wdi t < t wdi t < t wdi t < t wdi t < t wdi t < t wdi t wdi t rstin figure 3: watchdog timer timing diagram. constant current charge phase constant voltage charge phase preconditioning trickle charge phase i (ma) v (v) preconditioning threshold voltage (v min ) charge termination threshold current (i ch_term ) t (s) battery end of charge voltage regulation (v bat_reg ) fast-charge to top-off charge threshold trickle charge timeout (t k ) constant-current mode charge current (i ch_cc ) preconditioning charge current (i ch_pre ) charge current charge voltage constant current timeout (t c ) constant voltage timeout (t v ) figure 4: current vs. voltage and charger time profile.
AAT3601178 total power solution for portable applications product datasheet 24 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 24 3601.2008.07.1.1 www.analogictech.com power on reset power input voltage v chgin > v uvlo fault conditions monitoring ov, ot, v ts v ts 1 < < v ts2 preconditioning test v min > v bat current phase test v bat < v bat_reg voltage phase test i ch > i ch_term no no yes no preconditioning (trickle charge) constant current charge mode constant voltage charge mode yes yes yes charge completed charge timer control no recharge test v rch < v bat yes no shut down yes enable yes no device thermal loop monitor t j > 115 c thermal loop current reduction in adp charging mode thermal loop current reduction in c.c. mode no enable expired yes figure 5: system operation flow chart for the battery charger.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 25 www.analogictech.com constant-current mode charge current trickle charge continues until the battery voltage reach- es v min . at this point the battery charger begins con- stant-current charging. the current level default for this mode is programmed using a resistor from the iset pin to ground. once that resistor has been selected for the default charge current, then the current can be adjusted through i 2 c from a range of 40% to 180% of the pro- grammed default charge current. programmed current can be set at a minimum of 100ma and up to a maxi- mum of 1.44a. when the chgin_ok signal goes low, the default i 2 c setting of 100% is reset. if the use_usb signal is high when this happens, the charge current is reset to an internally set 100ma current until the micro- controller sends another i 2 c signal to change the charge current. (see i 2 c programming section). constant-voltage mode charge constant current charging will continue until the battery voltage reaches the output charge voltage regulation point v bat_reg . when the battery voltage reaches the regu- lation voltage (v bat_reg ), the battery charger will transition to constant-voltage mode. v bat_reg is factory programmed to 4.2v (nominal). charging in constant-voltage mode will continue until the charge current has reduced to the end of charge termination current programmed using the i 2 c interface (5%, 10%, 15%, or 20%). power saving mode after the charge cycle is complete, the battery charger turns off the series pass device and automatically goes into a power saving sleep mode. during this time, the series pass device will block current in both directions to prevent the battery from discharging through the battery charger. the battery charger will remain in sleep mode even if the charger source is disconnected. it will come out of sleep mode if either the battery terminal voltage drops below the v rch threshold, the charger enbat pin is recycled, or the charging source is reconnected. in all cases, the bat- tery charger will monitor all parameters and resume charging in the most appropriate mode. temperature sense (ts) the ts pin is available to monitor the battery tempera- ture. connect a 10k ntc resistor from the ts pin to ground. the ts pin outputs a 75 a constant current into the resistor and monitors the voltage to ensure that the battery temperature does not fall outside the limits depending on the temperature coefficient of the resistor used. when the voltage goes above 2.39v or goes below 331mv, the charging current will be suspended. charge safety timer (ct) while monitoring the charge cycle, the AAT3601 utilizes a charge safety timer to help identify damaged cells and to ensure that the cell is charged safely. operation is as follows: upon initiating a charging cycle, the AAT3601 charges the cell at 10% of the programmed maximum charge until v bat > 2.8v. if the cell voltage fails to the precondition threshold of 2.8v (typ) before the safety timer expires, the cell is assumed to be damaged and the charge cycle terminates. if the cell voltage exceeds 2.8v prior to the expiration of the timer, the charge cycle proceeds into fast charge. three timeout periods of 1 hour for trickle charge mode, 3 hours for constant current mode and 3 hours for constant voltage mode. mode time trickle charge (t k ) time out 25 minutes trickle charge (t k ) + constant current (t c ) mode time out 3 hours constant voltage (t v ) mode time out 3 hours table 1: charge safety timer (ct) timeout period for a 0.1 f ceramic timing capacitor. the ct pin is driven by a constant current source and will provide a linear response to increases in the timing capacitor value. thus, if the timing capacitor were to be doubled from the nominal 0.1 f value, the time-out periods would be doubled. if the programmable watch- dog timer function is not needed, it can be disabled by terminating the ct pin to ground or disabled using the i 2 c bus. the ct pin should not be left floating or unter- minated, as this will cause errors in the internal timing control circuit. the constant current provided to charge
AAT3601178 total power solution for portable applications product datasheet 26 3601.2008.07.1.1 www.analogictech.com the timing capacitor is very small, and this pin is suscep- tible to noise and changes in capacitance value. therefore, the timing capacitor should be physically located on the printed circuit board layout as close as possible to the ct pin. since the accuracy of the internal timer is domi- nated by the capacitance value, a 10% tolerance or bet- ter ceramic capacitor is recommended. ceramic capaci- tor materials, such as x7r and x5r types, are a good choice for this application. programming charge current (iset) the default constant current mode charge level is user programmed with a set resistor placed between the iset pin and ground. the accuracy of the constant charge current, as well as the preconditioning trickle charge current, is dominated by the tolerance of the set resistor. for this reason, a 1% tolerance metal film resistor is recommended for the set resistor function. the constant charge current levels from 100ma to 1a may be set by selecting the appropriate resistor value from table 2 and figures 6 and 7. the iset pin current to charging cur- rent ratio is 1 to 800. it is regulated to 1.25v during constant current mode unless changed using i 2 c com- mands. it can be used as a charging current monitor, based on the equation: i ch = 800 ? ? ? ? ? v iset r iset during preconditioning charge, the iset pin is regulated to 0.2v (figure 6), but the equation stays the same. during constant voltage charge mode, the iset pin volt- age will slew down and be directly proportional to the battery current at all times. constant charging current i ch_cc (ma) set resistor value (k ) 100 10 200 4.99 300 3.32 400 2.49 500 2 600 1.65 700 1.43 800 1.24 900 1.1 1000 1 table 2: constant current charge vs. i set resistor value. iset resistor (k ) i ch_cc (ma) 0 200 400 600 800 1000 1200 1400 0.1 1 10 100 figure 6: constant-current mode charge i ch_cc setting vs. i set resistor. battery voltage (v) v iset (v) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 2.5 2.9 3.3 3.7 4.1 4.5 figure 7: i set voltage vs. battery voltage. reverse battery leakage the AAT3601 includes internal circuitry that eliminates the need for series blocking diodes, reducing solution size and cost as well as dropout voltage relative to con- ventional battery chargers. when the input supply is removed or when chgin goes below the AAT3601?s under-voltage lockout (uvlo) voltage, or when chgin drops below v bat , the AAT3601 automatically reconfig- ures its power switches to minimize current drain from the battery. charge status output (stat and stat_bat) the AAT3601 provides battery charging status via a sta- tus pin. the stat is active low open drain for driving and led. stat_bat is the same function as stat pin but with opposite polarity to be used as a p flag. the status pin can indicate the following conditions:
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 27 www.analogictech.com event description stat no battery charging activity. low (to gnd) battery charging high (to v out1 ) charging completed low (to gnd) table 3: charge status output (stat). chgin bypass capacitor selection chgin is the power input for the AAT3601 battery char- ger. the battery charger is automatically enabled when- ever a valid voltage is present on chgin. in most appli- cations, chgin is connected to either a wall adapter or usb port. under normal operation, the input of the char- ger will often be ?hot-plugged? directly to a powered usb or wall adapter cable, and supply voltage ringing and overshoot may appear at the chgin pin. a high quality capacitor connected from chgin to g, placed as close as possible to the ic, is sufficient to absorb the energy. wall- adapter powered applications provide flexibility in input capacitor selection, but the usb specification presents limitations to input capacitance selection. in order to meet both the usb 2.0 and usb otg (on the go) spec- ifications while avoiding usb supply under-voltage condi- tions resulting from the current limit slew rate (100ma/ s) limitations of the usb bus, the chgin bypass capac- itance value must to be between 1 f and 4.7 f. ceramic capacitors are often preferred for bypassing applications due to their small size and good surge current ratings, but care must be taken in applications that can encounter hot plug conditions as their very low esr, in combination with the inductance of the cable, can create a high-q filter that induces excessive ringing at the chgin pin. this ringing can couple to the output and be mistaken as loop instability, or the ringing may be large enough to damage the input itself. although the chgin pin is designed for maximum robustness and an absolute max- imum voltage rating of +6.5v for transients, attention must be given to bypass techniques to ensure safe oper- ation. as a result, design of the chgin bypass must take care to ?de-q? the filter. this can be accomplished by connecting a 1 resistor in series with a ceramic capaci- tor (as shown in figure 8a), or by bypassing with a tan- talum or electrolytic capacitor to utilize its higher esr to dampen the ringing, as shown in figure 8b. for addi- tional protection, zener diodes with 6v clamp voltages may also be used. in any case, it is always critical to evaluate voltage transients at the chgin pin with an oscilloscope to ensure safe operation. thermal considerations the actual maximum charging current is a function of charge adapter input voltage, the state of charge of the battery at the moment of charge, the system supply cur- rent from sysout, and the ambient temperature and the thermal impedance of the package. the maximum pro- grammable current may not be achievable under all oper- ating parameters. issues to consider are the amount of current being sourced to the sysout pin from the chgin ldo at the same time as the charge current to bat. to usb port or wall adapter to usb port or wall adapter 1f ceramic (xr5/xr7) 4.7f esr > 1 1 chgin chgin (a) (b) figure 8: hot plug requirements.
AAT3601178 total power solution for portable applications product datasheet 28 3601.2008.07.1.1 www.analogictech.com the AAT3601 is offered in a tqfn55-36 package which can provide up to 4w of power dissipation when it is properly bonded to a printed circuit board and has a maximum thermal resistance of 25c/w. many consider- ations should be taken into account when designing the printed circuit board layout, as well as the placement of the charger ic package in proximity to other heat gen- erating devices in a given application design. the ambi- ent temperature around the charger ic will also have an effect on the thermal limits of a battery charging appli- cation. the maximum limits that can be expected for a given ambient condition can be estimated by the follow- ing discussion. first, the maximum power dissipation for a given situation should be calculated: (t j(max) - t a ) p d(max) = ja where: p d(max) = maximum power dissipation (4w) ja = package thermal resistance (25c/w) t j(max) = maximum device junction temperature (c) (140c) t a = ambient temperature (c) next, the power dissipation for the charger can be cal- culated by the following equation: p d = (v chgin - v bat ) i ch_cc + (v chgin i op ) + (v chgin - v sysout ) i sysout + (v sysout - v out1 ) i out1 + (v sysout - v out2 ) i out2 + (v sysout - v out3 ) i out3 + (v sysout - v out4 ) i out4 + (v sysout - v out5 ) i out5 + i outbuck 2 r ds(on)l + r ds(on)h [v sysout - v outbuck ] v sysout v outbuck v sysout ? ? ? ? where: p d = total power dissipation by the device v chgin = chgin input voltage v bat = battery voltage at the bat pin i ch_cc = constant charge current programmed for the application i op = quiescent current consumed by the ic for normal operation (0.5ma) v sysout and i sysout = output voltage and load current from the sysout pin for the system ldos and step- down converter (3.9v out for sysout) r ds(on)h and r ds(on)l = on-resistance of step-down high and low side mosfets (0.8 each) v outx and i outx = output voltage and load currents for the ldos and step-down converter (default output voltages) by substitution, we can derive the maximum charge cur- rent (i ch_cc(max) ) before reaching the thermal limit condi- tion (t reg = 100c, thermal loop regulation). the maxi- mum charge current is the key factor when designing battery charger applications. i ch_cc(max) = - [(v sysout - v out1 ) i out1 ] - (v sysout - v out2 ) i out2 - [(v sysout - v out3 ) i out3 ] - (v sysout - v out4 ) i out4 - (v sysout - v out5 ) i out5 v in - v bat - i outbuck 2 r ds(on)l + r ds(on)h (v sysout - v outbuck ) v sysout v outbuck v sysout ? ? ? ? (t reg - t a ) ja - (v chgin i op ) - (v chgin - v sysout ) i sysout ) in general, the worst condition is when there is the greatest voltage drop across the charger, when battery voltage is charged up to just past the preconditioning voltage threshold and the ldos and step-down con- verter are sourcing full output current. for example, if 700ma and 147ma are being sourced from the 3.9v sysout pin to the ldos and buck supply channels respectively (300ma to ldo2, 100ma to ldo1 and 3-5, and 147ma to buck; see buck efficiency graph for 300ma output current) with a chgin supply of 5v, and the battery is being charged at 3.0v, then the power dissipated will be 3.49w. a reduction in the charge cur- rent (through i 2 c) may be necessary in addition to reduction provided by the internal thermal loop of the charger itself. for the above example at t a = 30c, the i ch_cc(max) = 459ma. thermal overload protection the AAT3601 integrates thermal overload protection circuitry to prevent damage resulting from excessive thermal stress that may be encountered under fault con- ditions, for example. this circuitry disables all regulators if the AAT3601 die temperature exceeds 140c, and prevents the regulators from being enable until the die temperature drops by 15c (typ).
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 29 www.analogictech.com synchronous step-down (buck) converter the AAT3601 contains a high performance 300ma, 1.5mhz synchronous step-down converter. the step- down converter operates to ensure high efficiency per- formance over all load conditions. it requires only 3 external power components (c in , c out , and l). a high dc gain error amplifier with internal compensation controls the output. it provides excellent transient response and load/line regulation. transient response time is typically less than 20 s. the converter has soft start control to limit inrush current and transitions to 100% duty cycle at drop out. the step-down converter input pin pvin should be con- nected to the sysout ldo output pin. the output volt- age is internally fixed at 1.24v. power devices are sized for 300ma current capability while maintaining over 90% efficiency at full load. input/output capacitor and inductor apart from the input capacitor that is shared with the ldo inputs, only a small l-c filter is required at the output side for the step-down converter to operate properly. typically, a 2.2 h inductor such as the sumida cdrh2d11np- 2r2nc and a 4.7 f ceramic output capacitor are recom- mended for low output voltage ripple and small compo- nent size. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. a 10 f ceramic input capacitor is sufficient for most applications. control loop the converter is a peak current mode step-down con- verter. the inner, wide bandwidth loop controls the inductor peak current. the inductor current is sensed through the p-channel mosfet (high side) which is also used for short circuit and overload protection. a fixed slope compensation signal is added to the sensed cur- rent to maintain stability for duty cycles greater than 50%. the peak current mode loop appears as a voltage programmed current source in parallel with the output capacitor. the output of the voltage error amplifier programs the current mode loop for the necessary peak inductor cur- rent to force a constant output voltage for all load and line conditions. the voltage feedback resistive divider is internal and the error amplifier reference voltage is 0.45v. the voltage loop has a high dc gain making for excellent dc load and line regulation. the internal volt- age loop compensation is located at the output of the transconductance voltage error amplifier. soft-start soft start slowly increases the internal reference voltage when the input voltage or enable input is initially applied. it limits the current surge seen at the input and elimi- nates output voltage overshoot. current limit and over-temperature protection for overload conditions the peak input current is limited. as load impedance decreases and the output voltage falls closer to zero, more power is dissipated internally, raising the device temperature. thermal protection com- pletely disables switching when internal dissipation becomes excessive, protecting the device from damage. the junction over-temperature threshold is 140c with 15c of hysteresis. linear ldo regulators (out1-5) the advanced circuit design of the linear regulators has been specifically optimized for very fast start-up and shutdown timing. these proprietary ldos are tailored for superior transient response characteristics. these traits are particularly important for applications which require fast power supply timing. there are two ldo input pins avin1/2 which should be connected to the sysout ldo output pin. all ldo out- puts are initially fixed at default levels. the user can program the output voltages for all the ldos using i 2 c (see table 8). the high-speed turn-on capability is enabled through the implementation of a fast start control circuit, which accelerates the power up behavior of fundamental con- trol and feedback circuits within the ldo regulator. fast turn-off time response is achieved by an active output pull down circuit, which is enabled when an ldo regula- tor is placed in the shutdown mode. this active fast shutdown circuit has no adverse effect on normal device operation.
AAT3601178 total power solution for portable applications product datasheet 30 3601.2008.07.1.1 www.analogictech.com input/output capacitors the ldo regulator output has been specifically optimized to function with low cost, low esr ceramic capacitors. however, the design will allow for operation over a wide range of capacitor types. the input capacitor is shared with all ldo inputs and the step-down converter. a 10 f ceramic output capacitor is recommended for ldo2-5 and a 22 f is recommended for ldo1. current limit and over-temperature protection the regulator comes with complete short circuit and ther- mal protection. the combination of these two internal protection circuits gives a comprehensive safety system to guard against extreme adverse operating conditions. i 2 c serial interface and programmability serial interface many of the features of the AAT3601 can be controlled via the i 2 c serial interface. the i 2 c serial interface is a wide- ly used interface where it requires a master to initiate all the communications with the slave devices. the i 2 c pro- tocol consists of 2 active wire sda (serial data line) and scl (serial clock line). both wires are open drain and require an external pull up resistor to v cc (sysout may be used as v cc ). the sda pin serves i/o function, and the scl pin controls and references the i 2 c bus. i 2 c protocol is a bidirectional bus which allows both read and write actions to take place, but the AAT3601 supports the write protocol only. since the protocol has a dedicated bit for read or write access (r/w), when communicating with AAT3601, this bit must be set to ?0?. the timing diagram below depicts the transmission protocol. ack ack ack from slave from slave from slave start scl sda including r/w bit, chip address = 0x98 data msb msb msb lsb lsb lsb chip address register address 000 1 00 11 stop ack ack ack w figure 9: i 2 c timing diagram.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 31 www.analogictech.com start and stop conditions start and stop conditions are always generated by the master. prior to initiating a start condition, both the sda and scl pin are idle mode (idle mode is when there is no activity on the bus and sda and scl are pulled to v cc via external resistor). as depicted in figure 9, a start condition is defined to be when the master pulls the sda line low and after a short period pulls the scl line low. a start condition acts as a signal to the ics that something is about to be transmitted on the bus. a stop condition, also shown in figure 9, is when the master releases the bus and scl changes from low to high followed by sda low to high transition. the master does not issue an acknowlege and releases the scl and sda pins. transferring data every byte on the bus must be 8 bits long. a byte is always sent with a most significant bit first (see figure 10). r/w msb lsb figure 10: bit order. the address is embedded in the first seven bits of the byte. the eighth bit is reserved for the direction of the information flow for the next byte of information. for the AAT3601, this bit must be set to ?0?. the full 8-bit address including the r/w bit is 0x98 (hex) or 10011000 in binary. acknowledge bit acknowledge bit is the ninth bit of data. it is used to send back a confirmation to the master that the data has been received properly. for acknowledge to take place, the master must first release the sda line, then the slave will pull the data line low as shown in figure 9. serial programming code after sending the chip address, the master should send an 8-bit data stream to select which register to program and then the codes that the user wishes to enter. register 0x00: timer rchg 1 rchg 0 chg 2 chg 1 chg 0 term 1 term 0 register 0x01: not used not used not used not used not used sys ldo1 1 ldo1 0 register 0x02: ldo5 1 ldo5 0 ldo4 1 ldo4 0 ldo3 1 ldo3 0 ldo2 1 ldo2 0 figure 11: serial programming register codes. use_usb pin chg 2 chg 1 chg 0 constant current charge i ch_cc constant current charge as % of iset current 1 0 0 0 100ma ( xed internally) (default) 0 0 0 0 800ma (set by iset resistor) 100% (default) x 0 0 1 640ma 80% x 0 1 0 480ma 60% x 0 1 1 320ma 40% x 1 0 0 960ma 120% x 1 0 1 1120ma 140% x 1 1 0 1280ma 160% x 1 1 1 1440ma 180% table 4: chg bit setting for the constant current charge level (i set resistor = default 800ma charge current).
AAT3601178 total power solution for portable applications product datasheet 32 3601.2008.07.1.1 www.analogictech.com notes concerning the operation of the chg 2 , chg 1 and chg 0 bits or iset code. ? once the part is turned on using the en_sys pin (and there is a bat and/or chgin supply), and data is sent through i 2 c, the i 2 c codes in the registers will always be preserved until the part is shut down using the en_pe (going high) or if the bat and chgin are removed. ? if the part is turned on by connecting chgin (and not through en_sys), then when the chgin is discon- nected, the part will shut down and all i 2 c registers will be cleared. if use_usb = l, ? the charge current is set by the iset code in register 0x00, bits 2,3,4. (code 000 will equal 100%) ? if the part has been turned on by en_sys and chgin is disconnected then reconnected, it will still contain the code it had before (if it was 60% then it will remain 60%). ? if the part has not been turned on by en_sys and chgin is disconnected then reconnected, it will be reset to 100% (since the whole part was shutdown). if use_usb = h, ? iset code 000 in register 0x00, bits 2,3,4 = 100ma. the other codes stay the same as if use_usb = h. ? if the part has been turned on by en_sys and chgin is disconnected then reconnected, the iset code will be forced to 000 and the current will be set to 100ma. ? the next time any i 2 c register is programmed (even if it is not for the iset code), the iset code will revert back to what it was before. for example, if the iset code is set to 010 and use_usb = h and the part was turned on with en_sys, then when chgin is discon- nected then reconnected, the charger will be set to 100ma. then if any other command is sent, the iset code will remain 010. term 1 term 0 termination current (as % of constant current charge) 0 0 5% (default) 0 1 10% 1 0 15% 1 1 20% table 5: term bit setting for the termination current level. rchg 1 rchg 0 recharge threshold 0 0 4.00v (default) 0 1 4.05v 1 0 4.10v 1 1 4.15v table 6: rchg bit setting for the battery charger recharge voltage level. timer charger watchdog timer 0 on (default) 1 off (and reset to zero) table 7: timer bit setting for the charger watchdog timer. ldo1 1 ldo1 0 ldo1 output voltage 0 0 3.40v (default) 0 1 2.88v 1 0 3.50v 1 1 3.09v ldo2 1 ldo2 0 ldo2 output voltage 0 0 3.40v (default) 0 1 2.78v 1 0 3.09v 1 1 1.85v ldo3 1 ldo3 0 ldo3 output voltage 0 0 1.24v (default) 0 1 1.29v 1 0 1.34v 1 1 2.88v ldo4 1 ldo4 0 ldo4 output voltage 0 0 1.85v (default) 0 1 1.65v 1 0 1.24v 1 1 1.91v ldo5 1 ldo5 0 ldo5 output voltage 0 0 1.85v (default) 0 1 1.75v 1 0 1.55v 1 1 1.91v table 8: ldo bit setting for ldo output voltage level. sys bit sysout power source 0 if use_usb=h, sysout powered from bat if use_usb=l, sysout powered from chgin 1 sysout always powered from bat table 9: sys bit setting for sysout power path.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 33 www.analogictech.com layout guidance figure 12 is the schematic for the evaluation board. the evaluation board has extra components for easy evalua- tion; the actual bom need for the system is shown in table 10. when laying out the pc board, the following layout guideline should be followed to ensure proper operation of the AAT3601: 1. the exposed pad ep must be reliably soldered to pgnd/agnd and multilayer gnd. the exposed ther- mal pad should be connected to board ground plane and pins 17 and 31. the ground plane should include a large exposed copper pad under the package with vias to all board layers for thermal dissipation. 2. the power traces, including gnd traces, the lx traces and the vin trace should be kept short, direct and wide to allow large current flow. the l1 connec- tion to the lx pins should be as short as possible. use several via pads when routing between layers. 3. the input capacitors (c1 and c2) should be con- nected as close as possible to chgin (pin 28) and pgnd (pin 31) to get good power filtering. 4. keep the switching node lx away from the sensitive outbuck feedback node. 5. the feedback trace for the outbuck pin should be separate from any power trace and connected as closely as possible to the load point. sensing along a high current load trace will degrade dc load regula- tion. 6. the output capacitor c4 and l1 should be connected as close as possible and there should not be any signal lines under the inductor. 7. the resistance of the trace from the load return to the pgnd (pin 31) should be kept to a minimum. this will help to minimize any error in dc regulation due to differences in the potential of the internal signal ground and the power ground.
AAT3601178 total power solution for portable applications product datasheet 34 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 34 3601.2008.07.1.1 www.analogictech.com quantity value designator footprint description 510 f c1, c2, c3, c14, c15 0603 capacitor - ceramic - x5r, 6.3v, 20% 222 f c9 0805 capacitor - ceramic - 20%, 6.3v, x5r 4 4.7 f c4, c5, c6, c7, c8 0603 capacitor - ceramic - 20%, 6.3v, x5r 3 0.1 f c10, c11, c12 0402 capacitor - ceramic -16v, 10%, x5r 1 0.01 f c13 0402 capacitor - ceramic -16v, 10%, x7r 1 2.2 h l1 cdrh2d inductor - sumida cdrh2d11np-2r2nc 9 100k r5, r8, r20, r21, r22, r23, r25, r26, r27 0402 resistor - 5% 8 10k r17, r19, r24, r29, r31, r32, r33, r37 0402 resistor - 5% 1 1.24k r18 0402 resistor - 1% table 10: minimum AAT3601 bom. c11 0.01f c2 10f c3 10f c5 10f c4 4.7f c6 10f c7 10f c8 10f c9 22f r3 100k c1 10f r7 1.24k r8 10k chgin tp4 tp18 rstin tp21 stat_bat tp19 rstlpw tp20 stat scl tp2 sda tp1 1 2 3 4 gnd scl sda j2 data header c10 0.1f l1 2.2f r9 1k r10 1k r5 100k j5 j4 sysout outbuck chgin out1 out2 out3 out4 out5 bat tp5 ba t wdi 1 temp_flag 2 en_sys 3 statbat 4 en_pe 5 en_np 6 gnd 7 gnd 8 out5 9 out4 10 avin2 11 out3 12 out2 13 avin1 14 out1 15 agnd 16 cnoise 17 rstlpw 18 rstin 19 lx 20 pgnd 21 pvin 22 outbuck 23 sysout 24 sysout 25 bat 26 bat 27 chgin 28 use_usb 29 enbat 30 ts 31 iset 32 ct 33 stat 34 sda 35 scl 36 gnd_slug 37 u1 AAT3601 qfn55-36 1 2 3 4 5 j3 usb mini 1 2 j1 aux input tp3 agnd enbat use_usb use_usb use_usb r1 10k r2 10k out1 sw1 en_sys en_sys tp15 tp16 wdi use_usb tp7 r4 100k temp_flag tp14 chgin chgin chgin sw2 en_pe out1 tp17 en_pe j6 en_pe out1 b1 li+ battery outbuck tp8 out5 tp9 out4 tp10 out3 tp11 out2 tp12 out1 tp13 r6 100k out1 d1 green stat_bat d1 green stat sysout enbat enbat enbat tp6 figure 12: AAT3601 evaluation kit schematic.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 35 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 35 www.analogictech.com figure 13: AAT3601 evaluation kit top layer. figure 14: AAT3601 evaluation kit mid1 layer. figure 15: AAT3601 evaluation kit mid2 layer. figure 16: AAT3601 evaluation kit bottom layer.
AAT3601178 total power solution for portable applications product datasheet 36 3601.2008.07.1.1 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 36 3601.2008.07.1.1 www.analogictech.com ordering information package part marking 1 part number (tape and reel) 2 tqfn55-36 2rxyy AAT3601iih-t1 all analogictech products are offered in pb-free packaging. the term pb-free means semiconductor products that are in compliance with current rohs standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. for more information, please visit our website at http://www.analogictech.com/about/quality.aspx. packaging information tqfn55-36 0.750 0.050 0.000 + 0.050 - 0.000 0.203 ref 0.200 0.050 0.450 0.050 0.40 bsc 5.000 0.050 5.000 0.050 3.600 0.050 detail "a" 3.600 0.050 top view side view detail "a" bottom view index area (d/2 x e/2) r = 0.1 c = 0.3 all dimensions in millimeters. 1. xyy = assembly and date code. 2. sample stock is generally held on part numbers listed in bold . 3. the leadless package family, which includes qfn, tqfn, dfn, tdfn and stdfn, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process. a solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder c onnection.
AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 37 www.analogictech.com AAT3601178 total power solution for portable applications product datasheet 3601.2008.07.1.1 37 www.analogictech.com advanced analogic technologies, inc. 3230 scott boulevard, santa clara, ca 95054 phone (408) 737-4600 fax (408) 737-4611 ? advanced analogic technologies, inc. analogictech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an analogictech pr oduct. no circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. analogictech reserves the right to make changes to their products or speci cations or to discontinue any product or service without notice. except as provided in analogictech?s terms and conditions of sale, analogictech assumes no liability whatsoever, and analogictech disclaims any express or implied warranty re lating to the sale and/or use of analogictech products including liability or warranties relating to tness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right . in order to minimize risks associated with the customer?s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. testing and other quality control techniques are utilized to the extent analogictech deems necessary to support this warranty. speci c testing of all parameters of each device is not necessarily performed. analogictech and the analogictech logo are trademarks of advanced analogic technologies incorporated. all other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.

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